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?2012-2013 peregrine semiconductor corp. all rights reserved. page 1 of 13 document no. doc-33314-1 | www.psemi.com product specification ultracmos ? spdt rf switch 100 ? 6000 mhz PE42422 features ?? symmetric spdt reflective switch ?? low insertion loss ?? 0.25 db typical @ 1000 mhz ?? 0.40 db typical @ 3000 mhz ?? 0.65 db typical @ 5000 mhz ?? 0.90 db typical @ 6000 mhz ?? wide supply range of 2.3v to 5.5v ?? excellent linearity ?? iip2 of 115 dbm ?? iip3 of 70 dbm ?? high esd tolerance ?? 4kv hbm on rf pins to gnd ?? 1kv on all other pins ?? logic select (ls) pin provides maximum flexibility of control logic ?? 12-lead 2x2 mm qfn package figure 2. package type 12-lead 2x2x0.55 mm qfn figure 1. functional diagram product description the PE42422 is a harp? technology-enhanced spdt rf switch designed to cover a broad range of applications from 100-6000 mhz. this reflective switch integrates on-board cmos control logic with a low voltage cmos-compatible control interface and requires no external components. peregrine?s harp? technology enhancements deliver high linearity and exceptional harmonics performance. it is an innovative feature of the ultracmos ? process, providing performance superior to gaas with the economy and integration of conventional cmos. 71-0068
product specification PE42422 document no. doc-33314-1 | ultracmos ? rfic solutions page 2 of 13 ?2012-2013 peregrine semiconductor corp. all rights reserved. table 1. electrical specifications temp = 25c 1 , v dd = 2.3v to 5.5v (z s = z l = 50 ? ) parameter path condition min typ max units operational frequency 100 6000 mhz insertion loss 2 rfx to rfc 100-1000 mhz 0.25 0.35 db 1000-2000 mhz 0.30 0.40 db 2000-3000 mhz 0.40 0.50 db 3000-4000 mhz 0.50 0.70 db 4000-5000 mhz 0.65 0.90 2 db 5000-6000 mhz 0.90 1.25 2 db isolation rfx to rfc 100-1000 mhz 42 44 db 1000-2000 mhz 33 35 db 2000-3000 mhz 27 29 db 3000-4000 mhz 22 24 db 4000-5000 mhz 18 20 db 5000-6000 mhz 15 17 db isolation rfx to rfx 100-1000 mhz 40 41 db 1000-2000 mhz 32 33 db 2000-3000 mhz 26 28 db 3000-4000 mhz 22 24 db 4000-5000 mhz 18 20 db 5000-6000 mhz 15 16 db return loss 2 rfx to rfc 100-1000 mhz 28 db 1000-2000 mhz 21 db 2000-3000 mhz 20 db 3000-4000 mhz 18 db 4000-5000 mhz 16 2 db 5000-6000 mhz 13 2 db 2nd harmonic rfx-rfc +32 dbm output power, 850 / 900 mhz -99 dbc +32 dbm output power, 1800 / 1900 mhz -101 dbc 3rd harmonic rfx-rfc +32 dbm output power, 850 / 900 mhz -93 dbc +32 dbm output power, 1800 / 1900 mhz -87 dbc imd3 rf-rfc bands i, ii, v, viii +17 dbm cw @ tx freq at rfc, -15 dbm cw @ 2tx-rx at rfc, 50 ? -115 dbm iip2 rfx 100-6000 mhz 115 dbm iip3 rfx 100-6000 mhz 70 dbm input 0.1 db compression rfx or rfc 100-6000 mhz 34 dbm switching time 50% ctrl to (10%-90%) or (90%-10%) rf 2 4 s notes: 1. typical performa nce over temperature and v dd shown in figure 4 through figure 20 2. high frequency performance can be improved by external matching (see figure 21 through figure 26 and figure 29 )
product specification PE42422 ?2012-2013 peregrine semiconductor corp. all rights reserved. page 3 of 13 document no. doc-33314-1 | www.psemi.com table 5. absolute maximum ratings notes: 1. v dd within operating range specified in table 4 2 . hbm esd voltage (mil_std 883 method 3015.7) 3. mm esd voltage (jedec jesd22-a115-a) table 4. operating ranges parameter min typ max units v dd supply voltage 2.3 3.3 5.5 v i dd power supply current 120 200 a rfx-rfc input power (50 ? ) +32 dbm control voltage high 1.2 1.5 3.3 v control voltage low 0 0 0.5 v operating temperature range -40 +25 +85 c parameter/conditions min units p max input power 1 dbm esd voltage hbm 2 rf pins to gnd all other pins v v esd voltage mm, all pins 3 v max +32 4000 1000 200 t st storage temperature -65 +150 c figure 3. pin configuration (top view) table 2. pin descriptions pin no. pin name description 1 gnd ground 2 rf2 1 rf port 2 3 gnd ground 4 gnd ground 5 rfc 1 rf common 6 gnd ground 7 gnd ground 8 rf1 1 rf port 1 9 dgnd digital ground 10 v1 switch control input, cmos logic level 11 ls logic select, cmos logic level 12 v dd supply paddle gnd ground for proper device operation note 1: blocking capacitors needed only when non-zero dc voltage present table 3. truth table path v1 ls rfc-rf2 1 1 rfc-rf1 0 1 rfc-rf1 1 0 rfc-rf2 0 0 latch-up avoidance unlike conventional cmos devices, ultracmos ? devices are immune to latch-up. electrostatic discharge (esd) precautions when handling this ultracmos ? device, observe the same precautions that you would use with other esd-sensitive devices. although this device contains circuitry to protect it from damage due to esd, precautions should be taken to avoid exceeding the specified rating. moisture sensitivity level the moisture sensitivity level rating for the PE42422 in the 12-lead 2x2x0.55 mm qfn package is msl1. exceeding absolute maximum ratings may cause permanent damage. operation should be restricted to the limits in the operating ranges table.
product specification PE42422 document no. doc-33314-1 | ultracmos ? rfic solutions page 4 of 13 ?2012-2013 peregrine semiconductor corp. all rights reserved. typical performance data @ 25c and v dd = 3.3v unless otherwise specified figure 4. insertion loss rfx 1 figure 5. insertion loss vs temp (rf1-rfc) 1 figure 6. insertion loss vs temp (rf2-rfc) 1 note 1: high frequency performance can be improved by external matching (see figure 21 through figure 26 and figure 29 ) figure 7. insertion loss vs v dd (rf1-rfc) 1 figure 8. insertion loss vs v dd (rf2-rfc) 1
product specification PE42422 ?2012-2013 peregrine semiconductor corp. all rights reserved. page 5 of 13 document no. doc-33314-1 | www.psemi.com figure 9. rfx-rfx isolation vs temp figure 11. rfc-rfx isolation vs temp figure 12. rfc-rfx isolation vs v dd figure 10. rfx-rfx isolation vs v dd typical performance data @ 25c and v dd = 3.3v unless otherwise specified
product specification PE42422 document no. doc-33314-1 | ultracmos ? rfic solutions page 6 of 13 ?2012-2013 peregrine semiconductor corp. all rights reserved. figure 13. rfc port return loss vs temp (rf1 active) 1 figure 14. rfc port return loss vs v dd (rf1 active) 1 figure 15. rfc port return loss vs temp (rf2 active) 1 figure 16. rfc port return loss vs v dd (rf2 active) 1 typical performance data @ 25c and v dd = 3.3v unless otherwise specified note 1: high frequency performance can be improved by external matching (see figure 21 through figure 26 and figure 29 )
product specification PE42422 ?2012-2013 peregrine semiconductor corp. all rights reserved. page 7 of 13 document no. doc-33314-1 | www.psemi.com typical performance data @ 25c and v dd = 3.3v unless otherwise specified figure 17. active port return loss vs temp (rf1 active) 1 figure 18. active port return loss vs v dd (rf1 active) 1 figure 20. active port return loss vs v dd (rf2 active) 1 figure 19. active port return loss vs temp (rf2 active) 1 note 1: high frequency performance can be improved by external matching (see figure 21 through figure 26 and figure 29 )
product specification PE42422 document no. doc-33314-1 | ultracmos ? rfic solutions page 8 of 13 ?2012-2013 peregrine semiconductor corp. all rights reserved. performance comparison @ 25c and v dd = 3.3v with or without matching note 1: high frequency performance can be improved by external matching (see figure 21 through figure 26 and figure 29 ) figure 21. insertion loss rf1 1 figure 22. insertion loss rf2 1 figure 24. active port return loss (rf2 active) 1 figure 23. active port return loss (rf1 active) 1 figure 25. rfc port return loss (rf1 active) 1 figure 26. rfc port return loss (rf2 active) 1
product specification PE42422 ?2012-2013 peregrine semiconductor corp. all rights reserved. page 9 of 13 document no. doc-33314-1 | www.psemi.com evaluation board figure 27. evaluation board layout the spdt switch evaluation board was designed to ease customer evaluation of peregrine?s PE42422. the rf common port is connected through a 50 ? transmission line via the top sma connector, j2. rf1 and rf2 ports are connected through 50 ? transmission lines via sma connectors j1 and j3, respectively. a through 50 ? transmission is available via sma connectors j4 and j5. this transmission line can be used to estimate the loss of the pcb over the environmental conditions being evaluated. j8 provides dc and digital inputs to the device. the board is constructed of a four metal layer material with a total thickness of 62 mils. the top and bottom rf layers are rogers ro4350 material with a 10 mil rf core. the middle layers provide ground for the transmission lines. the transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 22 mils, trace gaps of 7 mils, and metal thickness of 2.1 mils. prt-29005
product specification PE42422 document no. doc-33314-1 | ultracmos ? rfic solutions page 10 of 13 ?2012-2013 peregrine semiconductor corp. all rights reserved. figure 28. evaluation board schematic 50 ohm 50 ohm 50 ohm v1 v2 v3 v4 v5 v5 v4 v3 v2 v1 v1 v2 mux2 mux1 vdd 50 ohm 1 1 3 3 5 5 7 7 2 2 4 4 6 6 8 8 10 10 9 9 j8 header 10 r2 s.a.t. j2 sma j1 sma j3 sma r1 s.a.t. 7 gnd 9 dgnd 11 ls 12 vdd 2 rf2 3 gnd 4 gnd 1 gnd 8 rf1 10 v1 5 rfc 6 gnd u1 PE42422_qfn_12l_2x2 c3 dni c2 dni c1 dni c5 dni c4 dni j4 sma j5 sma rf1 rf2 rfc/ant doc-33327
product specification PE42422 ?2012-2013 peregrine semiconductor corp. all rights reserved. page 11 of 13 document no. doc-33314-1 | www.psemi.com 50 ohm 50 ohm 50 ohm v1 v2 v3 v4 v5 v5 v4 v3 v2 v1 v1 v2 mux2 mux1 vdd 50 ohm dist. from part edge to c6 = 134 mils 1 1 3 3 5 5 7 7 2 2 4 4 6 6 8 8 10 10 9 9 j8 header 10 r2 s.a.t. j2 sma j1 sma j3 sma r1 s.a.t. 7 gnd 9 dgnd 11 ls 12 vdd 2 rf2 3 gnd 4 gnd 1 gnd 8 rf1 10 v1 5 rfc 6 gnd u1 PE42422_qfn_12l_2x2 c3 dni c2 dni c1 dni c5 dni c4 dni j4 sma j5 sma c6 0.25pf rf1 rf2 rfc/ant figure 29. evaluation board schematic with matching doc-33327
product specification PE42422 document no. doc-33314-1 | ultracmos ? rfic solutions page 12 of 13 ?2012-2013 peregrine semiconductor corp. all rights reserved. 2.00 2.00 a 0.10 c c 0.10 c top view side view bottom view 0.05 c seating plane pin #1 identifier b (x2) 0.10 c a b 0.05 c all features recommended land pattern 0.10 c (x2) 1.100.05 1.100.05 0.50 0.200.05 (x12) 0.2750.05 (x12) 1.00 1 3 4 6 7 9 10 12 2.40 0.475 (x12) 0.25 (x12) 0.50 1.10 2.40 1.10 0.152 ref. 0.05 max 0.60 max figure 30. package drawing 12-lead 2x2x0.55 mm qfn doc-01882 figure 31. top marking specifications ppzz yww marking spec symbol package marking definition pp de part number marking for PE42422 zz 00-99 last two digits of lot code y 0-9 last digit of year, starting from 2009 (0 for 2010, 1 for 2011, etc) ww 01-53 work week 17-0112
product specification PE42422 ?2012-2013 peregrine semiconductor corp. all rights reserved. page 13 of 13 document no. doc-33314-1 | www.psemi.com figure 32. tape and reel specifications 12-lead 2x2x0.55 mm qfn device orientation in tape top of device pin 1 nominal tolerance ao 2.20 0.1 bo 2.20 0.1 ko 0.75 0.1 tape feed direction table 6. ordering information order code description package shipping method PE42422mlaa-z PE42422 spdt rf switch green 12-lead 2x2mm qfn 3000 units t/r ek42422-01 PE42422 evaluation board evaluation kit 1/box advance information : the product is in a formative or design stage. the datasheet contains design target specifications for product development. specifications and features may change in any manner without notice. preliminary specification: the datasheet contains preliminary data. additional data may be added at a later date. peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. product specification: the datasheet contains final data. in the event peregrine decides to change the specifications, peregrine will notify custom ers of the intended changes by issuing a cnf (customer notification form). the information in this datasheet is believed to be reliable. however, peregrine assumes no liability for the use of this information. use shall be entirely at the user?s own risk. no patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. peregrine?s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the peregrine product could create a situation in which personal injury or death might occur. peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. the peregrine name, logo, ultracmos and utsi are registered trademarks and harp, multiswitch and dune are trademarks of peregrine semiconductor corp. peregrine products are protected under one or more of the following u.s. patents: http://patents.psemi.com . sales contact and information for sales and contact information please visit www.psemi.com .

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